![]() DDR DDR2 DDR3 DDR4 And DDR5 Memory Bandwidth By Generation 1 Having more cores and more PCIe devices is great, but if portions of the system are sitting idle waiting for data, then they are being wasted. One of the biggest challenges with system scaling is memory bandwidth. This trend will accelerate in the future with chiplets and CXL. What is clear is that servers are consolidating what used to be in racks into single nodes. Intel And AMD Core Count Growth For Mainstream Servers 2013 2023 Over the last ten years, the server market has evolved from 12 cores/ socket to 96 currently, with 128 cores/ socket coming relatively soon in the same platforms we already have in the market. Here is the setup from our earlier piece, Updated AMD EPYC and Intel Xeon Core Counts Over Time. Why DDR5 is Absolutely Necessary in Modern Servers: Core Count Growth Since this is a big topic, we also have a video for this one that you can find here:Īs always, we suggest opening this in its own tab, window, or app for a better viewing experience. We just wanted to say thank you to Micron for this help and also explain why our readers will see only Micron memory in this article. We worked with Micron, and the company is sponsoring this article and video, sending DDR5 RDIMMs to use in this article. It was time to do a bit of a deep dive on why DDR5 memory is different.Īs a quick note here, I wanted to do a piece on the DDR4 to DDR5 transition. Also, even if you have an ECC DDR5 UDIMM, it is no longer compatible with platforms that support RDIMMs. For example, there are now two memory channels on chip. We have already discussed the speed increase a bit, but a lot more has changed in this generation. Now that both Intel and AMD have launched new server platforms, the industry is firmly on the path of its DDR5 transition. ![]()
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